IDT74LVC112A datasheet
IDT74LVC112A manufactured by:
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3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET, 5V TOLERANT I/O | Download IDT74LVC112A datasheet from IDT |
pdf 76 kb |
IDT74LVC08APY8 | View IDT74LVC112A to our catalog | IDT74LVC112APG |